The present invention relates to a memory device, and more particularly to a sense amplifier for a dynamic type memory device making use of field effect transistors (hereinafter called FET's).
Recent developments towards large memory capacity and high speed operation in dynamic memories making use of MOS FET's, are remarkable, and dynamic memories having a memory capacity per chip of (64 to 256)K bits and an access time of (100 to 200) ns have been developed and subjected to practical use.
However, the problem of realizing large memory capacity and high speed operation has not been fully solved and there still remain unsolved many problems. An important one of these problems relates to a sense amplifier. The problem is such that as a result of realization of large memory capacity, stray capacitances and resistances associated with bit lines connected to a sense amplifier within the MOS dynamic memory are increased and hence amplification speed of the sense amplifier for a difference signal is lowered. Furthermore, due to the recent tendency of lowering the power supply voltage from 12 V to 5 V the difference signal based on a read signal from a memory cell which is to be determined by the sense amplifier has become small, the time required for amplifying the difference signal has become large, thereby making realization of high speed operation more difficult.
Now a sense amplifier is required to sense a difference signal appearing between bit lines at a high sensitivity and to quickly amplify the difference signal. In order to improve the amplification speed it is necessary to either enhance a capability of the transistors used in a flip-flop which is a major part of the sense amplifier or reduce the capacitance and time constant at the nodes of the sense amplifier on which the signal to be amplified is present. However, the former technique of simply enhancing a transistor capability is associated with an increase of the area of the transistor, and hence, it is contrary to realization of high integration density. In addition, as a result of the increase of the transistor area, the capacitance and time constant of the nodes would be increased. Therefore, the former technique cannot be employed in practice.
Hence, the latter technique of reducing capacitance and time constant of the nodes has been investigated as the preferred alternative approach. From the above-mentioned view point, a memory device having transfer gates interposed between the bit lines and the sense amplifier was proposed in U.S. Pat. No. 4,061,999 of Proebsting et al. According to the proposed technique, by making the transfer gates interposed between the bit lines and the sense amplifier as resistors having a high resistance during the period of amplification operation, the capacitances of the sense amplifiers appear small as viewed from the sense amplifier during the amplification operation period. Thereby the sense amplifier is enabled to achieve a high speed amplification operation substantially without being influenced by the capacitance of the bit lines. However, these transfer gates must hold the bit lines and the input/output points of the sense amplifier at the same potential by conducting in an unsaturated region during a precharge period. In this case, from the view point that a highly sensitive operation is realized by effectively utilizing the power supply voltage, the power supply voltage itself is used as a precharge voltage. Consequently, for the purpose of making the transfer gates conduct in the unsaturated region, a voltage at a higher level than the power supply voltage is necessitated as a driving voltage for the transfer gates, and this voltage must be maintained during the precharge period. To that end, in the heretofore known memory, special circuit means for generating a voltage higher than the power supply voltage was necessitated and it served as an obstacle against realization of a high integration density. Moreover, it is difficult to maintain such a voltage higher than the power supply voltage at a stable potential over the precharge period, and therefore, there was a shortcoming that the sensitivity of the sense amplifier would fluctuate for the respective operations.